On 8/18/2024 2:50 PM, Jan Petrous (OSS) wrote:
> NXP S32G2xx/S32G3xx and S32R45 are automotive grade SoCs
> that integrate one or two Synopsys DWMAC 5.10/5.20 IPs.
>
> The basic driver supports only RGMII interface.
>
You mention that it only supports RGMII.. so...
> +static int s32cc_gmac_write_phy_intf_select(struct s32cc_priv_data *gmac)
> +{
> + u32 intf_sel;
> +
> + switch (gmac->intf_mode) {
> + case PHY_INTERFACE_MODE_SGMII:
> + intf_sel = PHY_INTF_SEL_SGMII;
> + break;
> + case PHY_INTERFACE_MODE_RGMII:
> + case PHY_INTERFACE_MODE_RGMII_ID:
> + case PHY_INTERFACE_MODE_RGMII_TXID:
> + case PHY_INTERFACE_MODE_RGMII_RXID:
> + intf_sel = PHY_INTF_SEL_RGMII;
> + break;
> + case PHY_INTERFACE_MODE_RMII:
> + intf_sel = PHY_INTF_SEL_RMII;
> + break;
> + case PHY_INTERFACE_MODE_MII:
> + intf_sel = PHY_INTF_SEL_MII;
> + break;
> + default:
> + dev_err(gmac->dev, "Unsupported PHY interface: %s\n",
> + phy_modes(gmac->intf_mode));
> + return -EINVAL;
> + }
> +
> + writel(intf_sel, gmac->ctrl_sts);
> +
> + dev_dbg(gmac->dev, "PHY mode set to %s\n", phy_modes(gmac->intf_mode));
> +
Why does this code seem to support others?
Is that support just not yet fully baked?
