On 19/08/2024 14:57, Robin Murphy wrote: > Luckily, in this case it seems straightforward enough to be able to see > that if we have a "qcom,msm8996-smmu-v2" with 13 context banks then we > should just treat it as if it has 12 - it's also notable that it only > reports NUMSMRG=12, so we couldn't use more than that many S1 context > banks at once anyway. This is what the hypervisor reports: [ 2.550974] arm-smmu 5100000.iommu: probing hardware configuration... [ 2.557309] arm-smmu 5100000.iommu: SMMUv2 with: [ 2.563815] arm-smmu 5100000.iommu: stage 1 translation [ 2.568494] arm-smmu 5100000.iommu: address translation ops [ 2.573791] arm-smmu 5100000.iommu: non-coherent table walk [ 2.579434] arm-smmu 5100000.iommu: (IDR0.CTTW overridden by FW configuration) [ 2.585088] arm-smmu 5100000.iommu: stream matching with 12 register groups [ 2.592132] arm-smmu 5100000.iommu: 13 context banks (0 stage-2 only) [ 2.619316] arm-smmu 5100000.iommu: Supported page sizes: 0x63315000 [ 2.626225] arm-smmu 5100000.iommu: Stage-1: 36-bit VA -> 36-bit IPA [ 2.632645] arm-smmu 5100000.iommu: preserved 0 boot mappings smmu->num_mapping_groups = 12 smmu->num_context_banks = 13 Are you saying that smmu->num_context_banks > smmu->num_mapping_groups does not make sense? Would a well-placed if (smmu->num_context_banks > smmu->num_mapping_groups) smmu->num_context_banks = smmu->num_mapping_groups; be a proper work-around? (Probably in qcom_smmu_cfg_probe() so as to not interfere with other platforms.) Maybe to limit the side effects even more: if (of_device_is_compatible(smmu->dev->of_node, "qcom,msm8998-smmu-v2") && smmu->num_context_banks > smmu->num_mapping_groups)) smmu->num_context_banks = smmu->num_mapping_groups; Neither work-around would require changing the binding. Is either work-around acceptable, Robin? Regards
