On Wed, Jul 31, 2024 at 08:55:48PM GMT, Manivannan Sadhasivam wrote: > These register prints are useful to validate the init sequence against the > Qcom internal documentation and also to share with the Qcom hw engineers to > debug issues related to PHY. > > Sample debug prints: > > qcom-qmp-pcie-phy 1c0e000.phy: Writing Reg: QSERDES_V5_COM_SYSCLK_EN_SEL Offset: 0x0094 Val: 0xd9 > qcom-qmp-pcie-phy 1c0e000.phy: Writing Reg: QSERDES_V5_COM_HSCLK_SEL Offset: 0x0158 Val: 0x11 > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> -- With best wishes Dmitry
