On Mon, May 27, 2024 at 10:20:35AM +0300, Abel Vesa wrote:
> Currently, the x1e80100 uses pure V6 register offsets for DP part of the
> combo PHY. This hasn't been an issue because external DP is not yet
> enabled on any of the boards yet. But in order to enabled it, all these
Nit: '...in order to enable it'
> new V6 N4 register offsets are needed. So add them.
>
> Fixes: 762c3565f3c8 ("phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets")
> Co-developed-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
--
With best wishes
Dmitry
