Quoting Konrad Dybcio (2024-05-07 14:17:01)
>
>
> On 5/7/24 22:28, Stephen Boyd wrote:
> >>
> >
> > Can you share your patch that prints the message? What bit are you
> > checking in the hardware to determine if the RCG is enabled? Do you also
> > print the enable count in software?
>
> I already reset-ed the tree state, but I added something like
>
> if (rcg->cmd_rcgr == the one in the declaration)
> pr_err("gcc_sdcc2_apps_clk_src is %s\n", clk_is_enabled(hw) ? "ENABLED" : "DISABLED");
>
> to drivers/clk/qcom/clk-rcg2.c : __clk_rcg2_set_rate()
>
>
Ok. You're reading the software state because there isn't an is_enabled
clk_op for RCGs. Can you also read the CMD register (0x0 offset from
base) and check for CMD_ROOT_EN (bit 1) being set? That's what I mean
when I'm talking about the RCG being enabled in hardware. Similarly,
read CMD_ROOT_OFF (bit 31) to see if some child branch of the RCG is
enabled at this time.
