Move the graph connection between USB host, USB SS PHY and DP port to
the SoC dtsi file. They are linked in hardware in this way.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 13 -------------
arch/arm64/boot/dts/qcom/sm8650.dtsi | 4 ++++
2 files changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 4e94f7fe4d2d..65ee00db5622 100644
--- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
@@ -832,7 +832,6 @@ &mdss_dp0 {
&mdss_dp0_out {
data-lanes = <0 1>;
- remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
&pcie_1_phy_aux_clk {
@@ -1211,10 +1210,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
-&usb_1_dwc3_ss {
- remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
-};
-
&usb_1_hsphy {
vdd-supply = <&vreg_l1i_0p88>;
vdda12-supply = <&vreg_l3i_1p2>;
@@ -1233,18 +1228,10 @@ &usb_dp_qmpphy {
status = "okay";
};
-&usb_dp_qmpphy_dp_in {
- remote-endpoint = <&mdss_dp0_out>;
-};
-
&usb_dp_qmpphy_out {
remote-endpoint = <&redriver_ss_in>;
};
-&usb_dp_qmpphy_usb_ss_in {
- remote-endpoint = <&usb_1_dwc3_ss>;
-};
-
&xo_board {
clock-frequency = <76800000>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 8e0c1841f748..4624ea4906d9 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3675,6 +3675,7 @@ port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
};
};
@@ -3767,6 +3768,7 @@ port@1 {
reg = <1>;
usb_dp_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
};
@@ -3774,6 +3776,7 @@ port@2 {
reg = <2>;
usb_dp_qmpphy_dp_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
};
};
};
@@ -3864,6 +3867,7 @@ port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
};
};
--
2.39.2
