On 3/18/24 06:35, Taniya Das wrote:
Update the force mem core bit for UFS ICE clock to force the core on signal
to remain active during halt state of the clk.
Fixes: a3cc092196ef ("clk: qcom: Add Global Clock controller (GCC) driver for SC7280")
You describe the solution, but not the problem. Please state why it's necessary to do so. Konrad
