Unlike the the very close A740 GPU on the SM8550 SoC, the A750 GPU doesn't have an HWCFG block but a separate register set. The missing registers are added in the a6xx.xml.h file that would require a subsequent sync and the non-existent hwcfg is handled in a6xx_set_hwcg(). The A750 GPU info are added under the adreno_is_a750() macro and the ADRENO_7XX_GEN3 family id. This adds: - DT nodes Dependencies: None Tested using Mesa's main branch on the SM8650-QRD and with kmscube & vkcube to test basic rendering. Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> --- Changes in v4: - Dropped applied patches - Added a few more OPPs that are safe on all SKUs - Re-ordered the OPPs - Link to v3: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-0-eb1f4b86d8d3@xxxxxxxxxx Changes in v3: - Fixed smmu bindings if condition for GMU smmu - Collected reviews - Link to v2: https://lore.kernel.org/r/20240215-topic-sm8650-gpu-v2-0-6be0b4bf2e09@xxxxxxxxxx Changes in v2: - Added separate a6xx.xml.h sync from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576 - Collected review tags - Inlined skip_programming - Use A7XX_RBBM_CGC_P2S_STATUS_TXDONE instead of BIT(0) - Drop now useless placeholder comment - Removed interconnect properties - Rebased on current linux-next - Link to v1: https://lore.kernel.org/r/20240212-topic-sm8650-gpu-v1-0-708a40b747b5@xxxxxxxxxx --- Neil Armstrong (2): arm64: dts: qcom: sm8650: add GPU nodes arm64: dts: qcom: sm8650-qrd: enable GPU arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8 ++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 181 ++++++++++++++++++++++++++++++++ 2 files changed, 189 insertions(+) --- base-commit: 2e93f143ca010a5013528e1cfdc895f024fe8c21 change-id: 20240208-topic-sm8650-gpu-489d5e2c2b17 Best regards, -- Neil Armstrong <neil.armstrong@xxxxxxxxxx>
