On 23.02.2024 15:03, Mrinmay Sarkar wrote: > Due to some hardware changes, SA8775P has set the NO_SNOOP attribute > in its TLP for all the PCIe controllers. NO_SNOOP attribute when set, > the requester is indicating that there no cache coherency issues exit > for the addressed memory on the host i.e., memory is not cached. But > in reality, requester cannot assume this unless there is a complete > control/visibility over the addressed memory on the host. > > And worst case, if the memory is cached on the host, it may lead to > memory corruption issues. It should be noted that the caching of memory > on the host is not solely dependent on the NO_SNOOP attribute in TLP. > > So to avoid the corruption, this patch overrides the NO_SNOOP attribute > by setting the PCIE_PARF_NO_SNOOP_OVERIDE register. This patch is not > needed for other upstream supported platforms since they do not set > NO_SNOOP attribute by default. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> > --- > drivers/pci/controller/dwc/pcie-qcom-ep.c | 20 +++++++++++++++++--- > 1 file changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c > index 89d06a3e6e06..369954649254 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c > +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c > @@ -45,6 +45,7 @@ > #define PARF_SLV_ADDR_MSB_CTRL 0x2c0 > #define PARF_DBI_BASE_ADDR 0x350 > #define PARF_DBI_BASE_ADDR_HI 0x354 > +#define PARF_NO_SNOOP_OVERIDE 0x3d4 Any reason for this to be unsorted? Konrad
