On Wed, 21 Feb 2024 at 14:52, Abel Vesa <abel.vesa@xxxxxxxxxx> wrote: > > Add dedicated schema for PMIC ARB v7 as it allows multiple > buses by declaring them as child nodes. These child nodes > will follow the generic spmi bus bindings. > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > --- > .../bindings/spmi/qcom,spmi-pmic-arb-v7.yaml | 119 +++++++++++++++++++++ > 1 file changed, 119 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-v7.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-v7.yaml > new file mode 100644 > index 000000000000..8a93d2145aa5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-v7.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb-v7.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SPMI Controller v7 (PMIC Arbiter) > + > +maintainers: > + - Stephen Boyd <sboyd@xxxxxxxxxx> > + > +description: | > + The SPMI PMIC Arbiter v7 is found on Snapdragon chipsets. It is an SPMI > + controller with wrapping arbitration logic to allow for multiple on-chip > + devices to control up to 2 SPMI separate buses. > + > + The PMIC Arbiter can also act as an interrupt controller, providing interrupts > + to slave devices. > + > +properties: > + compatible: > + const: qcom,spmi-pmic-arb-v7 > + > + reg: > + items: > + - description: core registers > + - description: tx-channel per virtual slave regosters > + - description: rx-channel (called observer) per virtual slave registers > + > + reg-names: > + items: > + - const: core > + - const: chnls > + - const: obsrvr > + > + ranges: true > + > + '#address-cells': > + const: 2 > + > + '#size-cells': > + const: 2 > + > + qcom,ee: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 0 > + maximum: 5 > + description: > > + indicates the active Execution Environment identifier > + > + qcom,channel: > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 0 > + maximum: 5 > + description: > > + which of the PMIC Arb provided channels to use for accesses > + > +patternProperties: > + "spmi@[0-1]$": > + type: object > + $ref: /schemas/spmi/spmi.yaml > + > +required: > + - compatible > + - reg-names > + - qcom,ee > + - qcom,channel > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + spmi: arbiter@c400000 { > + compatible = "qcom,spmi-pmic-arb-v7"; > + reg = <0x0c400000 0x3000>, > + <0x0c500000 0x4000000>, > + <0x0c440000 0x80000>; > + reg-names = "core", "chnls", "obsrvr"; > + > + qcom,ee = <0>; > + qcom,channel = <0>; > + > + #address-cells = <2>; > + #size-cells = <2>; Shouldn't there be an empty 'ranges;' property? > + > + spmi_bus0: spmi@0 { > + reg = <0 0x0c42d000 0 0x4000>, > + <0 0x0c4c0000 0 0x10000>; Shouldn't the node address (@0, @1) match the first address from reg property? > + reg-names = "cnfg", "intr"; > + > + interrupt-names = "periph_irq"; > + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <4>; > + > + qcom,bus-id = <0>; I thought the goal was to drop qcom,bus-id ? > + > + #address-cells = <2>; > + #size-cells = <0>; > + }; > + > + spmi_bus1: spmi@1 { > + reg = <0 0x0c432000 0 0x4000>, > + <0 0x0c4d0000 0 0x10000>; > + reg-names = "cnfg", "intr"; > + > + interrupt-names = "periph_irq"; > + interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <4>; > + > + qcom,bus-id = <1>; > + > + #address-cells = <2>; > + #size-cells = <0>; > + }; > + }; > > -- > 2.34.1 > -- With best wishes Dmitry
