On Tue, 6 Feb 2024 at 15:28, <neil.armstrong@xxxxxxxxxx> wrote:
>
> On 06/02/2024 12:47, Krishna Kurapati wrote:
> > From: Andrew Halaney <ahalaney@xxxxxxxxxx>
> >
> > There is now support for the multiport USB controller this uses so
> > enable it.
> >
> > The board only has a single port hooked up (despite it being wired up to
> > the multiport IP on the SoC). There's also a USB 2.0 mux hooked up,
> > which by default on boot is selected to mux properly. Grab the gpio
> > controlling that and ensure it stays in the right position so USB 2.0
> > continues to be routed from the external port to the SoC.
What is connected to the other port of the MUX?
> >
> > Signed-off-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
> > Co-developed-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
> > Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 21 +++++++++++++++++++++
> > 1 file changed, 21 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> > index b04f72ec097c..eed1ddc29bc1 100644
> > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> > @@ -503,6 +503,18 @@ &usb_2_qmpphy0 {
> > status = "okay";
> > };
> >
> > +&usb_2 {
> > + pinctrl-0 = <&usb2_en>;
> > + pinctrl-names = "default";
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_2_dwc3 {
> > + phy-names = "usb2-port0", "usb3-port0";
> > + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>;
> > +};
> > +
> > &xo_board_clk {
> > clock-frequency = <38400000>;
> > };
> > @@ -655,4 +667,13 @@ wake-pins {
> > bias-pull-up;
> > };
> > };
> > +
> > + usb2_en: usb2-en-state {
> > + /* TS3USB221A USB2.0 mux select */
> > + pins = "gpio24";
> > + function = "gpio";
> > + drive-strength = <2>;
> > + bias-disable;
> > + output-low;
> > + };
> > };
>
> Isn't gpio-hog the preferred way to describe that ?
That depends. As this pinctrl describes board configuration, I'd agree
with Neil.
--
With best wishes
Dmitry
