On 2/4/2024 11:22 PM, Andrew Lunn wrote:
On Sun, Feb 04, 2024 at 05:59:10PM +0800, Jie Luo wrote:
On 1/30/2024 8:35 AM, Christian Marangi wrote:
+
+ /* If div is /256 assume nobody have set this value and
+ * try to find one MDC rate that is close the 802.3 spec of
+ * 2.5MHz
+ */
+ for (div = 256; div >= 8; div /= 2) {
+ /* Stop as soon as we found a divider that
+ * reached the closest value to 2.5MHz
+ */
+ if (DIV_ROUND_UP(ahb_rate, div) > 2500000)
+ break;
Hi Christian,
Sorry for the delayed review.
The MDIO hardware block supports higher frequency 6.25M and 12.5M,
Would you remove this 2.5MHZ limitation? On the IPQ platform, we
normally use 6.25MHZ.
802.3 says the clock has a maximum of 2.5MHz. So this code is correct.
It is however O.K. to go faster, but since that breaks the standard,
you need each board to indicate it knows all the devices on the bus do
support higher speeds and its O.K. to break the standard. You indicate
this by using the DT property in its .dts file. For an MDIO bus which
is totally internal, you could however put the DT property in the SoC
.dtsi file.
Andrew
Understand it, Thanks Andrew.
