On 1/23/24 16:12, Dmitry Baryshkov wrote:
On Tue, 23 Jan 2024 at 15:43, Ritesh Kumar <quic_riteshk@xxxxxxxxxxx> wrote:
On 1/16/2024 6:27 PM, Dmitry Baryshkov wrote:
On Tue, 16 Jan 2024 at 14:06, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
On 1/16/24 10:49, Ritesh Kumar wrote:
Enable Display Subsystem with Novatek NT36672E Panel
on qcm6490 idp platform.
Signed-off-by: Ritesh Kumar <quic_riteshk@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 100 +++++++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index 2a6e4907c5ee..efa5252130a1 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -9,6 +9,7 @@
#define PM7250B_SID 8
#define PM7250B_SID1 9
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "pm7250b.dtsi"
@@ -38,6 +39,25 @@
stdout-path = "serial0:115200n8";
};
+ lcd_disp_bias: lcd-disp-bias-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "lcd_disp_bias";
+ regulator-min-microvolt = <5500000>;
+ regulator-max-microvolt = <5500000>;
+ gpio = <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_disp_bias_en>;
property-n
property-names
all throughout the patch
Thanks, I will update in the new version.
+&gpu {
+ status = "disabled";
+};
Hm.. generally we disable the GPU in the SoC DT, but that doesn't
seem to have happened here..
Thinking about it more, is disabling it here necessary? Does it
not fail gracefully?
Missed this.
I'd say, I don't see a reason to disable it at all. The GPU should be
working on sc7280 / qcm4290.
With GPU device node enabled, adreno_bind failure is seen as the
"speed_bin" was not populated on QCM6490 target which leads to display
bind failure.
Excuse me please. The GPU node for sc7280 already has speed_bin, which
points to qfprom + 0x1e9, bits 5 to 9.
Do you mean that qcm6490 uses different speed bin location? Or
different values for the speed bins?
Spoke with GPU team and on QCM6490 board, only CPU rendering is
supported for now and there is no plan to enable GPU rendering in near
future.
This sounds like having the feature disabled for no particular reason.
Both the kernel and Mesa have supported the Adreno 635 for quite a
while.
643 [1], [2]
In this regard, what do you suggest
1) Disable GPU in QCM6490 DT (as per the current patch)
2) Disable GPU in the SoC DT, but enable it in other platform DTs. (This
will prompt change in all the dt's and we don't have all the devices to
test)
The second option definitely follows what is present on other platforms.
Please let me know your views on it.
Please enable the GPU instead.
+1
Konrad
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25408/diffs?commit_id=b1e851d66c3a3e53f1a464023f675f3f6cbd3503
[2] https://patches.linaro.org/project/linux-arm-msm/cover/20230926-topic-a643-v1-0-7af6937ac0a3@xxxxxxxxxx/
