Re: sa8755p ufs ice bug: gcc_ufs_phy_ice_core_clk status stuck at 'off'

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




On 1/9/2024 1:44 PM, Brian Masney wrote:
> On Mon, Jan 08, 2024 at 03:35:55PM -0800, Elliot Berman wrote:
>> On 1/8/2024 12:50 PM, Brian Masney wrote:
>>> On Mon, Jan 08, 2024 at 11:44:35PM +0530, Shazad Hussain wrote:
>>>> I can see that gcc_ufs_phy_ice_core_clk needs the gcc_ufs_phy_gdsc to be
>>>> enabled before this particular clk is enabled. But that required
>>>> power-domain I do not see in the ice DT node. That can cause this
>>>> problem.
>>>
>>> Thank you! I'll work on and post a patch set as I find free time over
>>> the next week or two.
>> I think I observe the same issue on sm8650. Symptoms seem to be same as
>> you've described. I'll test out the following diff and see if things
>> seem more reliable:
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> index fd4f9dac48a3..c9ea50834dc9 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> @@ -2526,6 +2526,7 @@ ice: crypto@1d88000 {
>>                                      "qcom,inline-crypto-engine";
>>                         reg = <0 0x01d88000 0 0x8000>;
>>  
>> +                       power-domains = <&gcc UFS_PHY_GDSC>;
>>                         clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
>>                 };
>>  
>>
>> If yes, I can post a patch for sm8650 if no else has yet.
> 
> The intermittent boot issue is still present against
> linux-next-20240109 with the following patch:
> 
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -1556,6 +1556,7 @@ ice: crypto@1d88000 {
>                         compatible = "qcom,sa8775p-inline-crypto-engine",
>                                      "qcom,inline-crypto-engine";
>                         reg = <0x0 0x01d88000 0x0 0x8000>;
> +                       power-domains = <&gcc UFS_PHY_GDSC>;
>                         clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
>                 };
> 

Things have been a bit more reliable for me after adding the power-domains.

Are you getting stuck at the same spot or somewhere else?

I've been looking at a similar issue to [1], so I wonder if maybe you're
facing that instead.

[1]: https://lore.kernel.org/linux-arm-msm/20240104101735.48694-1-laura.nao@xxxxxxxxxxxxx/T/#m39f7c80b59c750ee4c0082474c5c15b6055927ef




[Index of Archives]     [Linux ARM Kernel]     [Linux ARM]     [Linux Omap]     [Fedora ARM]     [Linux for Sparc]     [IETF Annouce]     [Security]     [Bugtraq]     [Linux MIPS]     [ECOS]     [Asterisk Internet PBX]     [Linux API]

  Powered by Linux