On Wed, Nov 29, 2023 at 10:47:18AM +0100, Christian Marangi wrote:
> On Wed, Nov 29, 2023 at 09:38:39AM +0000, Russell King (Oracle) wrote:
> > On Wed, Nov 29, 2023 at 03:12:13AM +0100, Christian Marangi wrote:
> > > @@ -1310,10 +1302,6 @@ static int at803x_cable_test_start(struct phy_device *phydev)
> > > */
> > > phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
> > > phy_write(phydev, MII_ADVERTISE, ADVERTISE_CSMA);
> > > - if (phydev->phy_id != ATH9331_PHY_ID &&
> > > - phydev->phy_id != ATH8032_PHY_ID &&
> > > - phydev->phy_id != QCA9561_PHY_ID)
> > > - phy_write(phydev, MII_CTRL1000, 0);
> > ...
> > > +static int at8031_cable_test_start(struct phy_device *phydev)
> > > +{
> > > + at803x_cable_test_start(phydev);
> > > + phy_write(phydev, MII_CTRL1000, 0);
> >
> > I don't think this is a safe change - same reasons as given on a
> > previous patch. You can't randomly reorder register writes like this.
> >
>
> Actually for this the order is keeped. Generic function is called and
> for at8031 MII_CTRL1000 is called on top of that.
Okay, but I don't like it. I would prefer this to be:
static void at803x_cable_test_autoneg(struct phy_device *phydev)
{
phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
phy_write(phydev, MII_ADVERTISE, ADVERTISE_CSMA);
}
static int at803x_cable_test_start(struct phy_device *phydev)
{
at803x_cable_test_autoneg(phydev);
return 0;
}
static int at8031_cable_test_start(struct phy_device *phydev)
{
at803x_cable_test_autoneg(phydev);
phy_write(phydev, MII_CTRL1000, 0);
return 0;
}
which makes it more explicit what is going on here. Also a comment
above the function stating that it's for AR8031 _and_ AR8035 would
be useful.
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