From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are
other connection paths:
- a path that connects rotator block to the DDR.
- a path that needs to be handled to ensure MDSS register access
functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG
interconnect.
Describe these paths bindings to allow using them in device trees and in
the driver
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
Documentation/devicetree/bindings/display/msm/mdss-common.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
index f69196e4cc76..6b4ce08a60dc 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml
@@ -66,12 +66,14 @@ properties:
items:
- description: Interconnect path from mdp0 (or a single mdp) port to the data bus
- description: Interconnect path from mdp1 port to the data bus
+ - description: Interconnect path from CPU to the reg bus
interconnect-names:
minItems: 1
items:
- const: mdp0-mem
- const: mdp1-mem
+ - const: cpu-cfg
resets:
items:
--
2.39.2
