This series add base description of UART, TLMM, RPMHCC, GCC and RPMh PD nodes which helps SM4450 boot to shell with console on boards with this SoC. Signed-off-by: Tengfei Fan <quic_tengfan@xxxxxxxxxxx> --- This patch series depends on below patch series: "[PATCH v2 0/4] clk: qcom: Add support for GCC and RPMHCC on SM4450" https://lore.kernel.org/linux-arm-msm/20230909123431.1725728-1-quic_ajipan@xxxxxxxxxxx/ "[PATCH v3 0/2] pinctl: qcom: Add SM4450 pinctrl driver" https://lore.kernel.org/linux-arm-msm/20230920064739.12562-1-quic_tengfan@xxxxxxxxxxx/ v2 -> v3: - fix dtbs_check warning - remove interconnect, iommu, scm and tcsr related code - rearrangement dt node - remove smmu, scm and tcsr related documentation update - enable CONFIG_SM_GCC_4450 in defconfig related patch v1 -> v2: - setting "qcom,rpmh-rsc" compatible to the first property - keep order by unit address - move tlmm node into soc node - update arm,smmu.yaml - add enable pinctrl and interconnect defconfig patches - remove blank line - redo dtbs_check check previous discussion here: [1] v2: https://lore.kernel.org/linux-arm-msm/20230915021509.25773-1-quic_tengfan@xxxxxxxxxxx [2] v2: https://lore.kernel.org/linux-arm-msm/20230908065847.28382-1-quic_tengfan@xxxxxxxxxxx Ajit Pandey (1): arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db node Tengfei Fan (4): dt-bindings: interrupt-controller: qcom,pdc: document qcom,sm4450-pdc arm64: dts: qcom: sm4450: Add RPMH and Global clock arm64: dts: qcom: add uart console support for SM4450 arm64: defconfig: enable clock controller and pinctrl for SM4450 .../interrupt-controller/qcom,pdc.yaml | 1 + arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++- arch/arm64/boot/dts/qcom/sm4450.dtsi | 106 ++++++++++++++++++ arch/arm64/configs/defconfig | 2 + 4 files changed, 125 insertions(+), 2 deletions(-) base-commit: dfa449a58323de195773cf928d99db4130702bf7 -- 2.17.1