Re: [PATCH v11 13/13] arm64: dts: qcom: sa8540-ride: Enable first port of tertiary usb controller

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On 7.09.2023 05:36, Krishna Kurapati PSSNV wrote:
> On 9/6/2023 10:28 PM, Konrad Dybcio wrote:
>> On 28.08.2023 15:30, Krishna Kurapati wrote:
>>> From: Andrew Halaney <ahalaney@xxxxxxxxxx>
>>> There is now support for the multiport USB controller this uses so
>>> enable it.
>>> The board only has a single port hooked up (despite it being wired up to
>>> the multiport IP on the SoC). There's also a USB 2.0 mux hooked up,
>>> which by default on boot is selected to mux properly. Grab the gpio
>>> controlling that and ensure it stays in the right position so USB 2.0
>>> continues to be routed from the external port to the SoC.
>>> Co-developed-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
>>> Signed-off-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
>>> [Krishna: Rebased on top of usb-next]
>>> Co-developed-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
>>> Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
>>> ---
>> Is there any benefit to removing the other ports?
>> i.e. are ports 1-3 not parked properly by the dwc3 driver if
>> they're never connected to anything?
> Hi Konrad,
>  Whether or not the phy is connected to a port, the controller would modify the GUSB2PHYCFG/GUSB3PIPECTL registers. But if we don't specify only one phy and let phys from base DTSI take effect (4 HS / 2 SS), we would end up initializing and powering on phy's which are never connected to a port. To avoid that we need to specify only one phy for this platform.
And does that have any major effect on power use?

Do these PHYs not have some dormant/low power mode?


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