On Wed, Aug 12, 2015 at 03:47:48PM +0100, Sricharan R wrote: > The cacheablity attributes are set when IOMMU_CACHE property > is true. So cachebility is set as either noncached (normal) > or cached (normal WBWA) directly and avoid setting using > tex remap. Does this IOMMU support the ARMv7 short descriptor format? If so, would it work with Yong's patch here: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/361615.html I've not gotten around to reviewing the latest version yet, but having other IOMMUs consolidate on one set of page table code would be a good thing. Will -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
