On 6.07.2023 12:51, Imran Shaik wrote:
>
>
> On 6/28/2023 4:36 PM, Konrad Dybcio wrote:
>> On 28.06.2023 11:28, Imran Shaik wrote:
>>> Add support for gcc_ddrss_ecpri_gsi_clk and update the GCC clkref clocks
>>> as per the latest hardware version of QDU1000 and QRU100 SoCs.
>>>
>>> Co-developed-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
>>> Signed-off-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
>>> Signed-off-by: Imran Shaik <quic_imrashai@xxxxxxxxxxx>
>>> ---
[...]
>>> .enable_reg = 0x9c004,
>>> .enable_mask = BIT(0),
>>> .hw.init = &(const struct clk_init_data) {
>>> .name = "gcc_pcie_0_clkref_en",
>>> - .ops = &clk_branch_ops,
>>> + .ops = &clk_branch2_ops,
>> This sounds like a separate fix, clk_branch_ops seems to only concern
>> 10+yo chips.
>>
>> Konrad
>
> Sure, will split this patch and push the next series.
One more nit, I noticed that a lot of QUIC folks respond to the comments
to their revision-N and send revision-(N+1) like 5 seconds later..
This maybe does not concern this message, as all you did is said "ok willfix",
but if you have some sort of a company-wide "upstream best practices" board,
you may add something like "wait a bit to let others respond to your email"
Konrad
>
> Thanks,
> Imran
>
>>> },
>>> },
>>> };
>>> @@ -2274,14 +2293,13 @@ static struct clk_branch gcc_tsc_etu_clk = {
>>> static struct clk_branch gcc_usb2_clkref_en = {
>>> .halt_reg = 0x9c008,
>>> - .halt_bit = 31,
>>> - .halt_check = BRANCH_HALT_ENABLE,
>>> + .halt_check = BRANCH_HALT,
>>> .clkr = {
>>> .enable_reg = 0x9c008,
>>> .enable_mask = BIT(0),
>>> .hw.init = &(const struct clk_init_data) {
>>> .name = "gcc_usb2_clkref_en",
>>> - .ops = &clk_branch_ops,
>>> + .ops = &clk_branch2_ops,
>>> },
>>> },
>>> };
>>> @@ -2523,6 +2541,8 @@ static struct clk_regmap *gcc_qdu1000_clocks[] = {
>>> [GCC_AGGRE_NOC_ECPRI_GSI_CLK] = &gcc_aggre_noc_ecpri_gsi_clk.clkr,
>>> [GCC_PCIE_0_PHY_AUX_CLK_SRC] = &gcc_pcie_0_phy_aux_clk_src.clkr,
>>> [GCC_PCIE_0_PIPE_CLK_SRC] = &gcc_pcie_0_pipe_clk_src.clkr,
>>> + [GCC_GPLL1_OUT_EVEN] = &gcc_gpll1_out_even.clkr,
>>> + [GCC_DDRSS_ECPRI_GSI_CLK] = &gcc_ddrss_ecpri_gsi_clk.clkr,
>>> };
>>> static const struct qcom_reset_map gcc_qdu1000_resets[] = {
