Add device node for the clock controller for the CPU cores and L2
clocks. It will be further used by the L2 and by the CPUfreq nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 26 ++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
index ab4b8f8270bb..c212215800d0 100644
--- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
@@ -213,6 +213,32 @@ sleep_clk: sleep_clk {
};
};
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ clocks = <&gcc PLL9>, /* hfpll0 */
+ <&gcc PLL10>, /* hfpll1 */
+ <&gcc PLL16>, /* hfpll2 */
+ <&gcc PLL17>, /* hfpll3 */
+ <&gcc PLL12>, /* hfpll_l2 */
+ <&acc0>,
+ <&acc1>,
+ <&acc2>,
+ <&acc3>,
+ <&l2cc>;
+ clock-names = "hfpll0",
+ "hfpll1",
+ "hfpll2",
+ "hfpll3",
+ "hfpll_l2",
+ "acpu0_aux",
+ "acpu1_aux",
+ "acpu2_aux",
+ "acpu3_aux",
+ "acpu_l2_aux";
+ #clock-cells = <1>;
+ #interconnect-cells = <1>;
+ };
+
sfpb_mutex: hwmutex {
compatible = "qcom,sfpb-mutex";
syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
--
2.39.2
