On 2023-05-04 09:46:42, Kuogee Hsieh wrote:
> Disabling the crossbar mux between DSC and PINGPONG currently
> requires a bogus enum dpu_pingpong value to be passed when calling
> dsc_bind_pingpong_blk() with enable=false, even though the register
> value written is independent of the current PINGPONG block. Replace
> that `bool enable` parameter with a new PINGPONG_NONE dpu_pingpong
> flag that triggers the write of the "special" 0xF "crossbar
> disabled" value to the register instead.
>
> Changes in v4:
> -- more details to commit text
>
> Changes in v5:
> -- rewording commit text suggested by Marijn
> -- add DRM_DEBUG_KMS for DSC unbinding case
>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Thanks for bearing with all the comments thus far!
Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 15 ++++++++-------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 3 ++-
> 4 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index cf1de5d..ffa6f04 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1850,7 +1850,7 @@ static void dpu_encoder_dsc_pipe_cfg(struct dpu_hw_dsc *hw_dsc,
> hw_pp->ops.setup_dsc(hw_pp);
>
> if (hw_dsc->ops.dsc_bind_pingpong_blk)
> - hw_dsc->ops.dsc_bind_pingpong_blk(hw_dsc, true, hw_pp->idx);
> + hw_dsc->ops.dsc_bind_pingpong_blk(hw_dsc, hw_pp->idx);
>
> if (hw_pp->ops.enable_dsc)
> hw_pp->ops.enable_dsc(hw_pp);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> index 4a6bbcc..47cb9f3 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
> @@ -157,7 +157,6 @@ static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc,
>
> static void dpu_hw_dsc_bind_pingpong_blk(
> struct dpu_hw_dsc *hw_dsc,
> - bool enable,
> const enum dpu_pingpong pp)
> {
> struct dpu_hw_blk_reg_map *c = &hw_dsc->hw;
> @@ -166,14 +165,16 @@ static void dpu_hw_dsc_bind_pingpong_blk(
>
> dsc_ctl_offset = DSC_CTL(hw_dsc->idx);
>
> - if (enable)
> + if (pp)
> mux_cfg = (pp - PINGPONG_0) & 0x7;
>
> - DRM_DEBUG_KMS("%s dsc:%d %s pp:%d\n",
> - enable ? "Binding" : "Unbinding",
> - hw_dsc->idx - DSC_0,
> - enable ? "to" : "from",
> - pp - PINGPONG_0);
> + if (pp)
> + DRM_DEBUG_KMS("Binding dsc:%d to pp:%d\n",
> + hw_dsc->idx - DSC_0,
> + pp - PINGPONG_0);
> + else
> + DRM_DEBUG_KMS("Unbinding dsc:%d from any pp\n",
> + hw_dsc->idx - DSC_0);
>
> DPU_REG_WRITE(c, dsc_ctl_offset, mux_cfg);
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> index 287ec5f..138080a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
> @@ -44,7 +44,6 @@ struct dpu_hw_dsc_ops {
> struct drm_dsc_config *dsc);
>
> void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc,
> - bool enable,
> enum dpu_pingpong pp);
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> index 1913a19..02a0f48 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> @@ -191,7 +191,8 @@ enum dpu_dsc {
> };
>
> enum dpu_pingpong {
> - PINGPONG_0 = 1,
> + PINGPONG_NONE,
> + PINGPONG_0,
> PINGPONG_1,
> PINGPONG_2,
> PINGPONG_3,
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
