Due to the wild nature of the Qualcomm RPM Message RAM, we can't really use 'reg' to point to the MPM's slice of Message RAM without cutting into an already-defined RPM MSG RAM node used for GLINK and SMEM. Document passing the register space as a slice of SRAM through the qcom,rpm-msg-ram property. This also makes 'reg' deprecated. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- .../devicetree/bindings/interrupt-controller/qcom,mpm.yaml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml index 509d20c091af..61fc5b1b74dc 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml @@ -29,6 +29,12 @@ properties: maxItems: 1 description: Specifies the base address and size of vMPM registers in RPM MSG RAM. + deprecated: true + + qcom,rpm-msg-ram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the APSS MPM slice of the RPM Message RAM interrupts: maxItems: 1 @@ -64,23 +70,22 @@ properties: required: - compatible - - reg - interrupts - mboxes - interrupt-controller - '#interrupt-cells' - qcom,mpm-pin-count - qcom,mpm-pin-map + - qcom,rpm-msg-ram additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> - mpm: interrupt-controller@45f01b8 { + mpm: interrupt-controller { compatible = "qcom,mpm"; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; - reg = <0x45f01b8 0x1000>; mboxes = <&apcs_glb 1>; interrupt-controller; #interrupt-cells = <2>; @@ -93,4 +98,5 @@ examples: <86 183>, <90 260>, <91 260>; + qcom,rpm-msg-ram = <&apss_mpm>; }; -- 2.40.0