On Wed, Mar 29, 2023 at 07:31:50PM +0530, Manivannan Sadhasivam wrote: > On Wed, Mar 29, 2023 at 03:19:51PM +0200, Johan Hovold wrote: > > On Wed, Mar 29, 2023 at 06:22:32PM +0530, Manivannan Sadhasivam wrote: > > Why would you need PCIe gen1 speed during suspend? > > That's what the suggestion I got from Qcom PCIe team. But I didn't compare the > value you added during icc support patch with downstream. More below... > > > These numbers are already somewhat random as, for example, the vendor > > driver is requesting 500 kBps (800 peak) during runtime, while we are > > now requesting five times that during suspend (the vendor driver gets a > > away with 0). > > Hmm, then I should've asked you this question when you added icc support. > I thought you inherited those values from downstream but apparently not. > Even in downstream they are using different bw votes for different platforms. > I will touch base with PCIe and ICC teams to find out the actual value that > needs to be used. We discussed things at length at the time, but perhaps it was before you joined to project. As I alluded to above, we should not play the game of using arbitrary numbers but instead fix the interconnect driver so that it can map the interconnect values in kBps to something that makes sense for the Qualcomm hardware. Anything else is not acceptable for upstream. Johan
