From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> This enables the QUPv3 interfaces that are exposed on the sa8775p-ride board: I2C, SPI and the Bluetooth and GNSS UART ports. v4 -> v5: - remove board-specific interrupt from UART17 in SoC dtsi - rearrange node properties to have various *-cells properties come right before status - collect more tags v3 -> v4: - use interconnect constants instead of magic numbers where applicable - pad addresses in reg to 8 digits - group pins under state nodes for UART v2 -> v3: - fix the interrupt number for uart12 - replace underscores with hyphens in DT node names (although make dtbs_check does not raise warnings about this) - rearrange the commits so that they're more fine-grained with separate patches for adding nodes to dtsi and enabling them for the board v1 -> v2: - uart17 is the Bluetooth port, not GNSS - add uart12 for GNSS too in that case Bartosz Golaszewski (9): arm64: dts: qcom: sa8775p: add the QUPv3 #2 node arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2 arm64: dts: qcom: sa8775p: add the i2c18 node arm64: dts: qcom: sa8775p-ride: enable i2c18 arm64: dts: qcom: sa8775p: add the spi16 node arm64: dts: qcom: sa8775p-ride: enable the SPI node arm64: dts: qcom: sa8775p: add high-speed UART nodes arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port arm64: dts: qcom: sa8775p-ride: enable the BT UART port arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 99 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 86 ++++++++++++++++++++ 2 files changed, 185 insertions(+) -- 2.37.2
