On 08-02-23, 20:00, Abel Vesa wrote: > For changelogs please look at each patch individually. > > Abel Vesa (11): > dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 > phy: qcom-qmp: pcs: Add v6 register offsets > phy: qcom-qmp: pcs: Add v6.20 register offsets > phy: qcom-qmp: pcs-pcie: Add v6 register offsets > phy: qcom-qmp: pcs-pcie: Add v6.20 register offsets > phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets > phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets > phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Applied to phy-next, thanks > dt-bindings: PCI: qcom: Add SM8550 compatible > PCI: qcom: Add SM8550 PCIe support > arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes > > .../devicetree/bindings/pci/qcom,pcie.yaml | 40 ++ > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 30 +- > arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 10 + > arch/arm64/boot/dts/qcom/sm8550.dtsi | 52 +-- > drivers/pci/controller/dwc/pcie-qcom.c | 25 +- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 346 +++++++++++++++++- > .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h | 15 + > .../qualcomm/phy-qcom-qmp-pcs-pcie-v6_20.h | 23 ++ > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 + > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h | 18 + > .../phy-qcom-qmp-qserdes-ln-shrd-v6.h | 32 ++ > .../phy-qcom-qmp-qserdes-txrx-v6_20.h | 45 +++ > drivers/phy/qualcomm/phy-qcom-qmp.h | 6 + > 13 files changed, 611 insertions(+), 47 deletions(-) > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_20.h > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h > create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h > > -- > 2.34.1 -- ~Vinod
