On 1/22/2023 10:29 PM, Robert Marko wrote:
On Sun, 22 Jan 2023 at 17:57, Kathiravan Thirumoorthy
<quic_kathirav@xxxxxxxxxxx> wrote:
On 1/21/2023 4:53 PM, Robert Marko wrote:
IPQ8074 has efuses like other Qualcomm SoC-s that are required for
determining various HW quirks which will be required later for CPR etc,
so lets add the QFPROM node for start.
Individidual fuses will be added as they are required.
Signed-off-by: Robert Marko <robimarko@xxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 8eba586065a3..f29491f647fe 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -301,6 +301,13 @@ mdio: mdio@90000 {
status = "disabled";
};
+ qfprom: efuse@a4000 {
+ compatible = "qcom,ipq8074-qfprom", "qcom,qfprom";
+ reg = <0x000a4000 0x1000>;
From the HW document, I see the overall size of this region is 0x2000,
any reason to stick with 0x1000?
Like always, I dont have access to docs and 0x1000 is all I could find
downstream
being used.
Any chance you can share the regions inside of QFPROM, it would be great to use
the ECC corrected one if available.
Sorry, What do you refer by "ECC corrected" here?
Thanks, Kathiravan T.
Regards,
Robert
Thanks, Kathiravan T.
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
prng: rng@e3000 {
compatible = "qcom,prng-ee";
reg = <0x000e3000 0x1000>;
