Add "qcom,adsp-pil-mode" property in clock nodes for herobrine
crd revision 3 board specific device tree.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
Tested-by: Mohammad Rafi Shaik <quic_mohs@xxxxxxxxxxx>
---
.../boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 232e1dc..e4afce6 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: BSD-3-Clause
+
/*
* sc7280 device tree source for boards using Max98360 and wcd9385 codec
* along with ADSP
@@ -176,6 +177,18 @@
<0 0x03550000 0x0 0xa100>;
};
+&lpass_aon {
+ qcom,adsp-pil-mode;
+};
+
+&lpass_core {
+ qcom,adsp-pil-mode;
+};
+
+&lpasscc {
+ qcom,adsp-pil-mode;
+};
+
&remoteproc_adsp {
status = "okay";
};
--
2.7.4
