On 11/01/2023 21:26, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2023-01-11 11:19:55)In some cases the driver might need using GPLL0 to drive CPU clocks. Bring it in through the sys_apcs_aux clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- drivers/clk/qcom/clk-cpu-8996.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index d51965fda56d..0e0c00d44c6f 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -12,6 +12,8 @@ * +-------+ * XO | | * +------------------>0 | + * SYS_APCS_AUX | | + * +------------------>3 | * | | * PLL/2 | SMUX +----+ * +------->1 | | @@ -310,20 +312,29 @@ static const struct clk_ops clk_cpu_8996_pmux_ops = { .determine_rate = clk_cpu_8996_pmux_determine_rate, };+static const struct parent_map smux_parent_map[] = {+ { .cfg = 0, }, /* xo */ + { .cfg = 1, }, /* pll */ + { .cfg = 3, }, /* sys_apcs_aux */ +}; + static const struct clk_parent_data pwrcl_smux_parents[] = { { .fw_name = "xo" }, { .hw = &pwrcl_pll_postdiv.hw }, + { .fw_name = "sys_apcs_aux" },Is there a binding update?
Argh, missed the patch. I knew that 13 is not a right number for the patch count!
-- With best wishes Dmitry
