This removes gpll7 clock source from sdcc2_apps as it caused issues on the device during testing Signed-off-by: Martin Botka <martin.botka@xxxxxxxxxxxxxx> --- drivers/clk/qcom/gcc-sm6125.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sm6125.c b/drivers/clk/qcom/gcc-sm6125.c index 0bd6bc54079f..9131469abde2 100644 --- a/drivers/clk/qcom/gcc-sm6125.c +++ b/drivers/clk/qcom/gcc-sm6125.c @@ -1153,7 +1153,6 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { F(25000000, P_GPLL0_OUT_AUX2, 12, 0, 0), F(50000000, P_GPLL0_OUT_AUX2, 6, 0, 0), F(100000000, P_GPLL0_OUT_AUX2, 3, 0, 0), - F(202000000, P_GPLL7_OUT_MAIN, 2, 0, 0), { } }; -- 2.37.3