On 14/07/2022 12:00, Johan Hovold wrote: > On Thu, Jul 14, 2022 at 11:07:21AM +0200, Krzysztof Kozlowski wrote: >> On 07/07/2022 15:46, Johan Hovold wrote: >>> Drop the redundant supply and clock descriptions which did not add much >>> information beyond what can be inferred from the corresponding resource >>> names. >>> >>> Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx> >> >> >> (...) >> >>> - const: ref >>> - const: refgen >>> resets: >>> - items: >>> - - description: reset of phy block. >>> + maxItems: 1 >>> reset-names: >>> items: >>> - const: phy >>> @@ -376,11 +334,7 @@ allOf: >>> then: >>> properties: >>> clocks: >>> - items: >>> - - description: Phy aux clock. >>> - - description: 19.2 MHz ref clk source. >>> - - description: 19.2 MHz ref clk. >> >> Here and in other places - I think you loose information, because the >> frequency is not mentioned in clock name. > > Right, but it is also arguable redundant information for the binding > (similar for the vdda-pll voltage). True. > > I can add a comment after the name if you prefer that? Ah, skip it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
