On Sun, 15 May 2022 at 17:44, Marijn Suijten
<marijn.suijten@xxxxxxxxxxxxxx> wrote:
>
> On 2022-05-14 15:51:55, Dmitry Baryshkov wrote:
> > On Sat, 14 May 2022 at 12:45, Marijn Suijten
> > <marijn.suijten@xxxxxxxxxxxxxx> wrote:
> > >
> > > On 2022-05-14 02:45:16, Dmitry Baryshkov wrote:
> > > > Replace numeric values with the symbolic names defined in the bindings
> > > > header.
> > > >
> > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> > >
> > > Seems there is one off-by-one copy-paste error. With that addressed:
> > >
> > > Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
> > >
> > > > ---
> > > > arch/arm64/boot/dts/qcom/sdm630.dtsi | 23 ++++++++++++-----------
> > > > 1 file changed, 12 insertions(+), 11 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> > > > index 17a1877587cf..01a1a1703568 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> > > > @@ -8,6 +8,7 @@
> > > > #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
> > > > #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
> > > > #include <dt-bindings/clock/qcom,rpmcc.h>
> > > > +#include <dt-bindings/interconnect/qcom,sdm660.h>
> > > > #include <dt-bindings/power/qcom-rpmpd.h>
> > > > #include <dt-bindings/gpio/gpio.h>
> > > > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > > @@ -1045,7 +1046,7 @@ adreno_gpu: gpu@5000000 {
> > > > nvmem-cells = <&gpu_speed_bin>;
> > > > nvmem-cell-names = "speed_bin";
> > > >
> > > > - interconnects = <&gnoc 1 &bimc 5>;
> > > > + interconnects = <&gnoc MASTER_APSS_PROC &bimc SLAVE_EBI>;
> > >
> > > From qcom,sdm660.h:
> > >
> > > /* GNOC */
> > > #define MASTER_APSS_PROC 0
> > > #define SLAVE_GNOC_BIMC 1
> > > #define SLAVE_GNOC_SNOC 2
> > >
> > > Seems like the left side should be SLAVE_GNOC_BIMC? Unless this
> > > semantic change is intended, in which case it should be clearly
> > > documented in its own commit with a Fixes tag.
> >
> > I don't think there can be a slave on the left side of the ICC path.
> > But nice catch anyway. Downstream uses MSM_BUS_MASTER_GRAPHICS_3D
> > here, which corresponds to <&bimc MASTER_OXILI>.
> > Could you please double check this?
>
> Agreed, my downstream source for this device also uses
> MSM_BUS_MASTER_GRAPHICS_3D=26 with mas_rpm_id=ICBID_MASTER_GFX3D=6, and
> on the right-side MSM_BUS_SLAVE_EBI_CH0=512 which resolves to
> slv_rpm_id=ICBID_SLAVE_EBI1=0. Both on &bimc.
>
> Have you double-checked all the other interconnect paths in this file?
Hmmmmm.
SDHCs also seem to be incorrect. For sdhc_1 downstream uses
<MSM_BUS_MASTER_SDCC_1 MSM_BUS_SLAVE_EBI_CH0>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_SDCC_1>.
For the upstream kernel this translates to <&a2noc MASTER_SDCC_1 &bimc
SLAVE_EBI>, <&gnoc MASTER_APSS_PROC &cnoc SLAVE_SDCC_1> (while we have
<&a2noc MASTER_SDCC_1 &a2noc SLAVE_A2NOC_SNOC>, <&gnoc
MASTER_APSS_PROC &cnoc SLAVE_SDCC_1>). Same applies for the sdhc2.
AngeloGioacchino, since SDHC interconnects were added by you, could
you please check?
For camss I suppose that downstream uses MASTER_CPP rather than
MASTER_VFE. If I'm not mistaken.
For venus the downstream path is equivalent <&mnoc MASTER_VENUS &bimc
SLAVE_EBI> (which we have here). vidc describes <&gnoc
MASTER_APSS_PROC &mnoc SLAVE_VENUS_CFG>. So venus cfg looks correct.
>
> - Marijn
>
> > >
> > > The rest looks correct.
> > >
> > > - Marijn
> > [..]
--
With best wishes
Dmitry
