On Wed, May 04, 2022 at 04:08:58PM +0200, Ulf Hansson wrote: > On Wed, 23 Feb 2022 at 13:57, Shawn Guo <shawn.guo@xxxxxxxxxx> wrote: > > > > It starts from updating cpu_pm to support CPU_LAST_PM_ENTER (and > > CPU_FIRST_PM_EXIT) event, and then adds DT binding and driver support > > for Qualcomm MPM (MSM Power Manager) interrupt controller. > > > > Changes for v6: > > - Add new event CPU_LAST_PM_ENTER (and CPU_FIRST_PM_EXIT) in cpu_pm > > - Drop vendor driver notes from commit log > > - Check NULL mpm_gic_map instead to save the use of MPM_NO_PARENT_IRQ > > - Add lock protection for register read in qcom_mpm_handler() > > - Return IRQ_NONE if there is no pending interrupt > > - Drop IRQF_TRIGGER_RISING flag from devm_request_irq() call since it's > > being specified in DT > > - Drop dev_set_drvdata() call which is a leftover from previous version > > - Fix dt_binding_check errors reported by upgraded dtschema > > My apologies for the late reply to this series. FYI, I fully agree > with the responses from Sudeep, etc, that have been made on this > series. > > The proper thing is to use genpd on/off notifiers, which should get > fired if you model the PM domain topology correctly in DT - and use > PSCI OSI. > > That said, please keep me posted when/if you submit a new version for > this. I will make sure to pay more attention next time. > [1] is the latest I believe. It now implements power domain as I requested and I was happy with that version. -- Regards, Sudeep [1] https://lore.kernel.org/lkml/20220308080534.3384532-1-shawn.guo@xxxxxxxxxx
