Hi Mani, On Mon, 2 May 2022 at 12:42, Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> wrote: > > The endpoint device will only read the context wp when the host rings > the doorbell. Are we sure about this statement? what if we update ctxt_wp while the device is still processing the previous ring? is it going to continue processing the new ctxt_wp or wait for a new doorbell interrupt? what about burst mode in which we don't ring at all (ring_db is no-op)? > And moreover the doorbell write is using writel(). This > guarantess that the prior writes will be completed before ringing > doorbell. Yes but the barrier is to ensure that descriptor/ring content is updated before we actually pass it to device ownership, it's not about ordering with the doorbell write, but the memory coherent ones. > > So there is no need of an additional dma_wmb() to order the coherent > memory writes w.r.t each other. Even if the writes gets reordered, it > won't affect the endpoint device. > > Cc: Loic Poulain <loic.poulain@xxxxxxxxxx> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > drivers/bus/mhi/host/main.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/bus/mhi/host/main.c b/drivers/bus/mhi/host/main.c > index 966ffc2458b9..6706a82d3aa8 100644 > --- a/drivers/bus/mhi/host/main.c > +++ b/drivers/bus/mhi/host/main.c > @@ -138,11 +138,6 @@ void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl, > > db = ring->iommu_base + (ring->wp - ring->base); > > - /* > - * Writes to the new ring element must be visible to the hardware > - * before letting h/w know there is new element to fetch. > - */ > - dma_wmb(); > *ring->ctxt_wp = cpu_to_le64(db); > > mhi_chan->db_cfg.ring_db(mhi_cntrl, &mhi_chan->db_cfg, > -- > 2.25.1 > Regards, Loic
