Add drive strength property for primary and secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@xxxxxxxxxxx>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@xxxxxxxxxxx>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 34 ++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index d58045d..4c4a0e9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -588,6 +588,40 @@ ap_ec_spi: &spi10 {
bias-disable;
};
+&mi2s0_data0 {
+ drive-strength = <6>;
+};
+
+&mi2s0_data1 {
+ drive-strength = <6>;
+};
+
+&mi2s0_mclk {
+ drive-strength = <6>;
+};
+
+&mi2s0_sclk {
+ drive-strength = <6>;
+};
+
+&mi2s0_ws {
+ drive-strength = <6>;
+};
+
+&mi2s1_data0 {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_sclk {
+ drive-strength = <6>;
+ bias-disable;
+};
+
+&mi2s1_ws {
+ drive-strength = <6>;
+};
+
&pcie1_clkreq_n {
bias-pull-up;
drive-strength = <2>;
--
2.7.4
