Add speedbin efuse nvmem binding needed for the opp table for the CPU
freqs.
Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx>
Tested-by: Jonathan McDowell <noodles@xxxxxxxx>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index a1079583def9..629e22236f5b 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -981,6 +981,9 @@ tsens_calib: calib@400 {
tsens_calib_backup: calib_backup@410 {
reg = <0x410 0xb>;
};
+ speedbin_efuse: speedbin@0c0 {
+ reg = <0x0c0 0x4>;
+ };
};
gcc: clock-controller@900000 {
--
2.34.1
