On Thu, 3 Feb 2022 at 19:45, Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> wrote: > > Hi Loic, > > On 2/3/22 7:29 PM, Loic Poulain wrote: > > Hi Vladimir, > > > > On Thu, 3 Feb 2022 at 17:47, Vladimir Zapolskiy > > <vladimir.zapolskiy@xxxxxxxxxx> wrote: > >> > >> The change is wanted to postpone initialization of busses on CCI controller > >> by cci_init() and cci_reset() till adapters are registered, the later is > >> needed for adding I2C bus devices and get correspondent vbus regulators. > > > > This is odd, I don't think it's a good idea to register an adapter > > which is not yet initialized. Could you elaborate on why you need to > > do this, if you can't access the controller without this regulator > > enabled, maybe it is more than vbus supply, and, in that case, it > > should be enabled from your probe function. > > thank you for review, the controller can be accessed without a vbus regulator, > but I2C devices connected to the master controller can not. > > The registration of a master controller device done by i2c_add_adapter() > should be safe to defer IMO, because there shall be no communication on > the bus at this point, there are no slaves before probe completion, thus > cci_init()/cci_reset() can be safely called afterwards. > > The rationale of the change is to merge two loops over busses, see change 6/9, > keeping two loops extremely complicates the proper resource management. OK, I see, I'm sure it works, but I still think that registering the adapter should be the last step, without making assumptions on when the i2c core is going to use it. Maybe the point here is the initial bad design/implementation of cci_reset and cci_init. cci_reset() is a global reset and then should not depend on subnode initialization in order to be executed early in the probe.You can e.g add an 'irq_complete' completion to the cci struct. The CCI_IRQ_MASK_0 bit should probably be added here as well. cci_init() should be subnode/master specific (cci_init_master) so that you call it in the registering loop, updating master specific timings and irq-mask bits. Thoughs? Regards, Loic
