Quoting Nikita Travkin (2021-12-09 08:37:18)
> Sometimes calculation of d value may result in 0 because of the
> rounding after integer division. This causes the following error:
>
> [ 113.969689] camss_gp1_clk_src: rcg didn't update its configuration.
> [ 113.969754] WARNING: CPU: 3 PID: 35 at drivers/clk/qcom/clk-rcg2.c:122 update_config+0xc8/0xdc
>
> Make sure that D value is never zero.
>
> Fixes: 7f891faf596e ("clk: qcom: clk-rcg2: Add support for duty-cycle for RCG")
> Signed-off-by: Nikita Travkin <nikita@xxxxxxx>
> ---
> drivers/clk/qcom/clk-rcg2.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
> index 6964cf914b60..fdfd43e2a01b 100644
> --- a/drivers/clk/qcom/clk-rcg2.c
> +++ b/drivers/clk/qcom/clk-rcg2.c
> @@ -424,6 +424,10 @@ static int clk_rcg2_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty)
> if (d > mask)
> d = mask;
>
> + /* Hardware can't handle d=0, make sure it's at least 1 */
> + if (!d)
> + d = 1;
Maybe clamp() would be better
/*
* Check bit widths of 2d. If D is too big reduce duty cycle and
* ensure it is non-zero.
*/
clamp(d, 1, mask);
> +
> if ((d / 2) > (n - m))
> d = (n - m) * 2;
> else if ((d / 2) < (m / 2))
