Quoting Nikita Travkin (2021-12-09 08:37:17) > In cases when MND is not enabled (e.g. when only Half Integer Divider is > used), setting D registers makes no effect. Fail instead of making > ineffective write. > > Fixes: 7f891faf596e ("clk: qcom: clk-rcg2: Add support for duty-cycle for RCG") > Signed-off-by: Nikita Travkin <nikita@xxxxxxx> > --- > drivers/clk/qcom/clk-rcg2.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c > index e1b1b426fae4..6964cf914b60 100644 > --- a/drivers/clk/qcom/clk-rcg2.c > +++ b/drivers/clk/qcom/clk-rcg2.c > @@ -396,7 +396,7 @@ static int clk_rcg2_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) > static int clk_rcg2_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) > { > struct clk_rcg2 *rcg = to_clk_rcg2(hw); > - u32 notn_m, n, m, d, not2d, mask, duty_per; > + u32 notn_m, n, m, d, not2d, mask, duty_per, cfg; > int ret; > > /* Duty-cycle cannot be modified for non-MND RCGs */ > @@ -407,6 +407,11 @@ static int clk_rcg2_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) > > regmap_read(rcg->clkr.regmap, RCG_N_OFFSET(rcg), ¬n_m); > regmap_read(rcg->clkr.regmap, RCG_M_OFFSET(rcg), &m); > + regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg); > + > + /* Duty-cycle cannot be modified if MND divider is in bypass mode. */ > + if (!(cfg & CFG_MODE_MASK)) > + return -EINVAL; Should we still allow 50% duty cycle to succeed?