On Thu, 14 Dec 2023 at 12:35, Steven Rostedt <rostedt@xxxxxxxxxxx> wrote:
>
> On Thu, 14 Dec 2023 11:44:55 -0800
> Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> > On Thu, 14 Dec 2023 at 08:55, Steven Rostedt <rostedt@xxxxxxxxxxx> wrote:
> > >
> > > And yes, this does get called in NMI context.
> >
> > Not on an i486-class machine they won't. You don't have a local apic
> > on those, and they won't have any NMI sources under our control (ie
> > NMI does exist, but we're talking purely legacy NMI for "motherboard
> > problems" like RAM parity errors etc)
>
> Ah, so we should not worry about being in NMI context without a 64bit cmpxchg?
.. on x86.
Elsewhere, who knows?
It is *probably* true in most situations. '32-bit' => 'legacy' =>
'less likely to have fancy profiling / irq setups'.
But I really don't know.
> > So no. You need to forget about the whole "do a 64-bit cmpxchg on
> > 32-bit architectures" as being some kind of solution in the short
> > term.
>
> But do all archs have an implementation of cmpxchg64, even if it requires
> disabling interrupts? If not, then I definitely cannot remove this code.
We have a generic header file, so anybody who uses that would get the
fallback version, ie
arch_cmpxchg64 -> generic_cmpxchg64_local -> __generic_cmpxchg64_local
which does that irq disabling thing.
But no, not everybody is guaranteed to use that fallback. From a quick
look, ARC, hexagon and CSky don't do this, for example.
And then I got bored and stopped looking.
My guess is that *most* 32-bit architectures do not have a 64-bit
cmpxchg - not even the irq-safe one.
For the UP case you can do your own, of course.
Linus
