On Mon, Dec 04, 2023 at 05:51:49PM +0100, Valentin Schneider wrote: > On 20/11/23 13:05, Peter Zijlstra wrote: > > On Mon, Nov 20, 2023 at 11:55:28AM +0100, Valentin Schneider wrote: > >> __use_tsc is only ever enabled in __init tsc_enable_sched_clock(), so mark > >> it as __ro_after_init. > >> > >> Signed-off-by: Valentin Schneider <vschneid@xxxxxxxxxx> > >> --- > >> arch/x86/kernel/tsc.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > >> index 15f97c0abc9d0..f19b42ea40573 100644 > >> --- a/arch/x86/kernel/tsc.c > >> +++ b/arch/x86/kernel/tsc.c > >> @@ -44,7 +44,7 @@ EXPORT_SYMBOL(tsc_khz); > >> static int __read_mostly tsc_unstable; > >> static unsigned int __initdata tsc_early_khz; > >> > >> -static DEFINE_STATIC_KEY_FALSE(__use_tsc); > >> +static DEFINE_STATIC_KEY_FALSE_RO(__use_tsc); > > > > So sure, we can absolutely do that, but do we want to take this one > > further perhaps? "notsc" on x86_64 makes no sense what so ever. Lets > > drag things into this millennium. > > > > Just to make sure I follow: currently, for the static key to be enabled, we > (mostly) need: > o X86_FEATURE_TSC is in CPUID > o determine_cpu_tsc_frequencies()->pit_hpet_ptimer_calibrate_cpu() passes > > IIUC all X86_64 systems have a TSC, so the CPUID feature should be a given. > > AFAICT pit_hpt_ptimer_calibrate_cpu() relies on having either HPET or the > ACPI PM timer, the latter should be widely available, though X86_PM_TIMER > can be disabled via EXPERT - is that a fringe case we don't care about, or > did I miss something? I don't really know this stuff, and I'm trying to > write a changelog... Ah, I was mostly just going by the fact that all of x86_64 have TSC and disabling it makes no sense. TSC calibration is always 'fun', but I don't know of a system where its failure causes us to not use TSC, Thomas?
