On Tue, 09 Aug 2022 10:19:31 +0100,
Huacai Chen <chenhuacai@xxxxxxxxxx> wrote:
>
> Hi, Marc,
>
> On Tue, Aug 9, 2022 at 4:56 PM Marc Zyngier <maz@xxxxxxxxxx> wrote:
> >
> > On Tue, 09 Aug 2022 08:45:22 +0100,
> > Huacai Chen <chenhuacai@xxxxxxxxxxx> wrote:
> > >
> > > This patch fix a CPU hotplug issue. The EIOINTC master core (the first
> > > core of an EIOINTC node) should not be disabled at runtime, since it has
> > > the responsibility of dispatching I/O interrupts.
> > >
> > > Signed-off-by: Huacai Chen <chenhuacai@xxxxxxxxxxx>
> > > ---
> > > arch/loongarch/kernel/smp.c | 9 +++++++++
> > > drivers/irqchip/irq-loongson-eiointc.c | 5 +++++
> > > 2 files changed, 14 insertions(+)
> > >
> > > diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c
> > > index 09743103d9b3..54901716f8de 100644
> > > --- a/arch/loongarch/kernel/smp.c
> > > +++ b/arch/loongarch/kernel/smp.c
> > > @@ -242,9 +242,18 @@ void loongson3_smp_finish(void)
> > >
> > > static bool io_master(int cpu)
> > > {
> > > + int i, node, master;
> > > +
> > > if (cpu == 0)
> > > return true;
> > >
> > > + for (i = 1; i < loongson_sysconf.nr_io_pics; i++) {
> > > + node = eiointc_get_node(i);
> > > + master = cpu_number_map(node * CORES_PER_EIO_NODE);
> > > + if (cpu == master)
> > > + return true;
> > > + }
> > > +
> > > return false;
> > > }
> > >
> > > diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
> > > index 170dbc96c7d3..6c99a2ff95f5 100644
> > > --- a/drivers/irqchip/irq-loongson-eiointc.c
> > > +++ b/drivers/irqchip/irq-loongson-eiointc.c
> > > @@ -56,6 +56,11 @@ static void eiointc_enable(void)
> > > iocsr_write64(misc, LOONGARCH_IOCSR_MISC_FUNC);
> > > }
> > >
> > > +int eiointc_get_node(int id)
> > > +{
> > > + return eiointc_priv[id]->node;
> > > +}
> > > +
> > > static int cpu_to_eio_node(int cpu)
> > > {
> > > return cpu_logical_map(cpu) / CORES_PER_EIO_NODE;
> >
> >
> > I don't understand why it has to be this complex and make any use of
> > the node number.
> >
> > As I understand it, CPU-0 in any EIOINTC block is a master. So all you
> > need to find out is whether the CPU number is a multiple of
> > CORES_PER_EIO_NODE.
> CPU-0 in any EIOINTC block may be a master, but not absolutely be a
> master to dispatch I/O interrupts. If there is no bridge under a
> EIOINTC, then this EIOINTC doesn't handle I/O interrupts, and it can
> be disabled at runtime.
But that's not what your code is checking, is it? You're only
reporting the node number, irrespective of whether there is anything
behind the EIOINTC.
M.
--
Without deviation from the norm, progress is not possible.
