Re: [PATCH V2 2/2] LoongArch: Add qspinlock support

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Hi, Arnd,

On Thu, Jun 23, 2022 at 10:04 PM Arnd Bergmann <arnd@xxxxxxxx> wrote:
>
> On Thu, Jun 23, 2022 at 3:05 PM Huacai Chen <chenhuacai@xxxxxxxxxx> wrote:
> > On Thu, Jun 23, 2022 at 4:26 PM Arnd Bergmann <arnd@xxxxxxxx> wrote:
> > >
> > > On Thu, Jun 23, 2022 at 9:56 AM Huacai Chen <chenhuacai@xxxxxxxxxx> wrote:
> > > > On Thu, Jun 23, 2022 at 1:45 PM Guo Ren <guoren@xxxxxxxxxx> wrote:
> > > > >
> > > > > On Thu, Jun 23, 2022 at 12:46 PM Huacai Chen <chenhuacai@xxxxxxxxxxx> wrote:
> > > > > >
> > > > > > On NUMA system, the performance of qspinlock is better than generic
> > > > > > spinlock. Below is the UnixBench test results on a 8 nodes (4 cores
> > > > > > per node, 32 cores in total) machine.
> > >
> > > You are still missing an explanation here about why this is safe to
> > > do. Is there are
> > > architectural guarantee for forward progress, or do you rely on
> > > specific microarchitectural
> > > behavior?
> > In my understanding, "guarantee for forward progress" means to avoid
> > many ll/sc happening at the same time and no one succeeds.
> > LoongArch uses "exclusive access (with timeout) of ll" to avoid
> > simultaneous ll (it also blocks other memory load/store on the same
> > address), and uses "random delay of sc" to avoid simultaneous sc
> > (introduced in CPUCFG3, bit 3 and bit 4 [1]). This mechanism can
> > guarantee forward progress in practice.
> >
> > [1] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_cpucfg
>
> If there is an architected feature bit for the delay, does that mean that there
> is a chance of CPUs getting released that set this to zero?
I had an offline discussion with hardware engineers, they told me that
it is a mandatory requirement for LoongArch to implement "exclusive
access of ll" and "random delay of sc" for multi-core chips. Only
single-core and dual-core processors (and not support multi-chip
interconnection) are allowed to have no such features.

Huacai
>
> In that case, you probably need a boot-time check for this feature bit
> to refuse booting a kernel with qspinlock enabled when it has more than
> one active CPU but does not support the random backoff, and you need
> to make the choice user-visible, so users are able to configure their
> kernels using the ticket spinlock. The ticket lock may also be the best
> choice for smaller configurations such as a single-socket 3A5000 with
> four cores and no NUMA.
>
>        Arnd



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