Hi Zhenyu, On 3/24/20 1:45 PM, Zhenyu Ye wrote: > In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL > feature allows TLBs to be issued with a level allowing for quicker > invalidation. This series provide support for this feature. > > Patch 1 and Patch 2 was provided by Marc on his NV series[1] patches, > which detect the TTL feature and add __tlbi_level interface. How does this interact with THP? (I don't see anything on that in the series.) With THP, there is no one answer to the size of mapping in a VMA. This is a problem because the arm-arm has in "Translation table level hints" in D5.10.2 of DDI0487E.a: | If an incorrect value for the entry being invalidated by the | instruction is specified in the TTL field, then no entries are | required by the architecture to be invalidated from the TLB. If we get it wrong, not TLB maintenance occurs! Unless THP leaves its fingerprints on the vma, I think you can only do this for VMA types that THP can't mess with. (see transparent_hugepage_enabled()) Thanks, James
