On Wed, 12 Dec 2018, Paul E. McKenney wrote: > > > > Or am I still missing something here? > > > > > > You tell me... > > > > I think I am on board. ;-) > > And more to the point, here is a three-process variant showing a cycle > that is permitted: > > > P0 P1 P2 > Wa=2 Wb=2 Wc=2 > mb0s > [mb01] [mb02] > mb0e > Rb=0 Rc=0 Ra=0 > > As can be seen by reordering it as follows: > > P0 P1 P2 > Ra=0 > Wa=2 > mb0s > [mb01] > Rc=0 > Wc=2 > [mb02] > mb0e > Rb=0 > Wb=2 > > Make sense? You got it! Alan
