On 2018/9/11 2:17, Borislav Petkov wrote:
The Hygon Dhyana CPU support both legacy and extension PMC MSRs(perf
I don't know but for some reason, you are writing "Hygon Dhyana CPU" as
being plural. But it is singular:
"The Hygon Dhyna CPU supports both ..."
^
|||
Will take more care of the usage between singular and plural and fix
the typo.
counter registers and event selection registers), so add Hygon Dhyana
support to get bit offset in the similar way as AMD does.
"to get bit offset"?
These words are used with the tendency to explain what the patch do,
actually they are not needed and will be removed.
--
Regards,
Pu Wen
