On Sat, Jul 07, 2018 at 04:08:47PM +0800, Guo Ren wrote: > On Fri, Jul 06, 2018 at 02:17:16PM +0200, Peter Zijlstra wrote: > CPU0 CPU1 > > WRITE_ONCE(x, 1) WRITE_ONCE(y, 1) > r0 = xchg(&y, 2) r1 = xchg(&x, 2) > > must not allow: r0==0 && r1==0 > So we must add a smp_mb between WRITE_ONCE() and xchg(), right? The state (r0==0 && r1==0) _must_ not be allowed in the above snippet (so, even without the additional smp_mb() between WRITE_ONCE() and xchg()). In informal terms, xchg() provides the smp_mb(). Compare implementations of xchg() and xchg_relaxed(). The following could also be helpful (in addition to the references pointed out earlier): Documentation/atomic_t.txt Andrea > > Guo Ren >
