Nick Piggin wrote: > On Tue, Mar 23, 2010 at 10:24:07AM +0000, Catalin Marinas wrote: > > But hmm, I don't know if we even need acquire/release IO barriers at > all. Might be better to just fix up wmb(), get rid of mmiowb(), > strengthen IO accessors, and then just add special case barriers as > the need arises. I must admit I don't understand what wmb() means at this point, generically from the point of view of arch-independent drivers! It's not an inter-CPU ordering (smb_wmb is sufficient), and it doesn't order all memory and I/O writes (otherwise why mmiowb?). I suspect a few people have been unsure, resulting in a bit of confusion about what goes into different arch implementations of wmb(). For strengthening I/O accessors, do you mean the equivalent of putting "dmb;dsb" before _and_ after the I/O write inside every call to writel()? (That's using ARM as an example: "dmb" means barrier, and "dsb" means flush write buffers I think, and some ARMs need other, rather heavier instructions such as a coprocessor instruction or even an instruction to the L2 cache.) Because I'm not sure if that's as light as we'd like it to be on slower CPUs, and __raw_writel or something will get used instead by some driver writer... leading back to needing to be very clear about the meaning of wmb/mmiowb. -- Jamie -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
