On Wed, Jul 15, 2009 at 05:49:47PM +1000, Benjamin Herrenschmidt wrote: > Upcoming paches to support the new 64-bit "BookE" powerpc architecture > will need to have the virtual address corresponding to PTE page when > freeing it, due to the way the HW table walker works. > > Basically, the TLB can be loaded with "large" pages that cover the whole > virtual space (well, sort-of, half of it actually) represented by a PTE > page, and which contain an "indirect" bit indicating that this TLB entry > RPN points to an array of PTEs from which the TLB can then create direct > entries. RPN is PFN in ppc speak, right? > Thus, in order to invalidate those when PTE pages are deleted, > we need the virtual address to pass to tlbilx or tlbivax instructions. Interesting arrangement. So are these last level ptes modifieable from userspace or something? If not, I wonder if you could manage them as another level of pointers with the existing pagetable functions? > The old trick of sticking it somewhere in the PTE page struct page sucks > too much, the address is almost readily available in all call sites and > almost everybody implemets these as macros, so we may as well add the > argument everywhere. I added it to the pmd and pud variants for consistency. > > Signed-off-by: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx> > --- > > I would like to merge the new support that depends on this in 2.6.32, > so unless there's major objections, I'd like this to go in early during > the merge window. We can sort out separately how to carry the patch > around in -next until then since the powerpc tree will have a dependency > on it. Can't see any problem with that. -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
