On Fri, 7 Nov 2008, Paul E. McKenney wrote: > > > Would that make more sense ? > > > > > > > Oh, actually, I got things reversed in this email : the readl(io_addr) > > must be done _after_ the __m_cnt_hi read. > > > > Therefore, two consecutive executions would look like : > > > > barrier(); /* Make sure the compiler does not reorder __m_cnt_hi and > > previous mmio read. */ > > read __m_cnt_hi > > smp_rmb(); /* Waits for every cached memory reads to complete */ > > If these are MMIO reads, then you need rmb() rather than smp_rmb(), > at least on architectures that can reorder writes (Power, Itanium, > and I believe also ARM, ...). The read is from a clock source. The only writes that are happening is by the clock itself. On a UP system, is a rmb still needed? That is, can you have two reads on the same CPU from the clock source that will produce a backwards clock? That to me sounds like the clock interface is broken. -- Steve -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
